ICS2O: SPRING 2019
7. INDEPENDENT STUDY PROJECT PRESENTATIONS
CLASS REFERENCE PROJECTS CONCEPTS SUPPLEMENTAL
37
May 29
Final Class
Mandatory Attendance
ISP
Peer Evaluation Criteria

ISPs:
CB HD JL MM TP JR
OS CT WT HV JW
CB FB DC AG EL RM
LO BS LT MT MvD
36
May 27
Mandatory Attendance
ISP
Peer Evaluation Criteria

5b, 5c
6. A COUNTING CIRCUIT
CLASS REFERENCE PROJECTS CONCEPTS SUPPLEMENTAL
35
May 23
A Counting Circuit
H. Encasement
Counting Circuits:
CB HD JL MM TP JR
OS CT WT HV JW
CB FB DC* AG EL RM
LO BS LT MT MvD
34
May 21
A Counting Circuit
G. PCB Soldering
33
May 16
Binary Game Finals @ 1:15
WT vs DC
A Counting Circuit

E. Binary Coded Decimal (BCD) Decoder

The 4511 BCD to 7-Segment Decoder
F. Seven-Segment Display
Click for

Interfacing Strategy
32
May 14
A Counting Circuit
D. Decimal Counting
Binary Up/Down Counter (4510)

The 4516 Up/Down (0-15) Counter

31
May 10
RSGC ACES:
Decade Counter
A Counting Circuit
C. Decade Counter (4017)
NGO Square Wave Output as Clock Input
to our
FIRST Specialized IC:
The 4017 Decade Counter

30
May 8

CapacitorVisualizer
Fola's Version

A Counting Circuit
B. NAND Gate Oscillator (4011) Part 2
Animations:
TP3, RC Drain
Explore changes to RC2 components
Fill/Drain Animations:
RC2-0.01uF, RC2-0.1uF

29
May 6


A Counting Circuit
B. NAND Gate Oscillator (4011) Part 1
Animation:
TP3

28
May 2
ISP Proposal Due

A Counting Circuit
A. Analog Input
Animations: tp1, tp2, 3
5. DIGITAL FUNDAMENTALS, LOGIC GATES, and INTEGRATED CIRCUITS (ICs)
CLASS REFERENCE PROJECTS CONCEPTS SUPPLEMENTAL
27
Apr 30
p. 45
What is the difference between
Vcc, Vdd, Vee, Vss, etc?

Digital Name Pairs
, The Binary Number System
Number Systems: Binary (2)
Octal (8), Decimal (10), Hexadecimal (16) Binary Representation of Characters:

ASCII Table, Unicode
ISP Discussion
26
Apr 26

555 Tutorials: #1, #2
(you want Astable mode)
LM555 Datasheet
Fun 555 Circuits
555 Calculator

Best 555 Tutorial
on the Web...
Eater's Astable 555

Intense Class
Note
: Section 2 misses this one
:(

Operational Amplifiers
As Comparator: p.71
FALSTAD: 555 Simulation
(Circuits > 555 Timer > Square Wave Generator)

25
April 24


4081 Datasheet

Review of Truth Tables
Combinational Logic Activities:

FALSTAD: Logic Gate IC Circuits

Multiple Input Gates
Gates as Operators: Boolean Arithmetic
The eXclusive OR (XOR) Gate
Activity. Addition-Related Logic Circuits

The Binary Game

24
April 18

Don't try this@home...
Decapping ICs

p. 47-48

Combinational Logic Activties:
FALSTAD: Logic Gate IC Circuits
Digital Logic Gates, Truth Tables
Multivibrator Vids:
CB HD JL MM*, TP JR
OS CT, WT HV* JW
CB
FB* DC AG EL RM,
LO* BS* LT* MT MvD
23
April 16

Transition from...
ANALOG (Continuous) to DIGITAL (Discrete):
Boolean Algebra and Venn Diagrams

Activity: Transistors as Logic Gates (TTL)
ISP?

The Venn Box
4. TRANSISTORS
CLASS REFERENCE SUPPLEMENTAL CONCEPTS PROJECTS
21
April 12


George Boole

Final Review of (and Parts Distribution for) the
Astable Multivibrator Project
(Falstad Simulation)

John Venn
20
April 10

pp. 33-36

FALSTAD: Simple Transistor Circuit
Transistor Test Circuits
Automatic 'Knight' Light
  
19
April 8

Alternative NPNs:
PN2222A, BC547


The Best(?)
Transistor Introduction

  
Transistor Basics, Testing, and Switches
What is to gain by knowing hFE?
The NPN Transistor (2N3904): Animation
The PNP Transistor (2N3906): Animation
Transistor Test Circuits
Capacitor Vids:
CB HD JL MM TP JR OS CT
WT HV JW CB FB DC AG EL RM LO BS LT MT MvD
  
3. CAPACITORS
CLASS REFERENCE SUPPLEMENTAL CONCEPTS PROJECTS
18
Apr 4
Project 2. The Capacitor Visualizer
Soldering
and Assembly Stage
N. Vassos'
The Capacitor Visualizer
Soldering Tutorial
2
17
Apr 2


Project 2. The Capacitor Visualizer
Prototype
and Time Trials Stage
16
Mar 29
pp. 30-31
Capacitors


Capacitor Codes
  
The Charge/Discharge Circuit
Unit of Measure: Farads, Ranges

15
Mar 27

The Underlying Principle of Digital Logic:
Pull-Down
and Pull-Up Resistor Configurations
LOGIC Functions: OR, AND
Diode-Resistor Logic (DRL)

Michael Faraday
MARCH BREAK
2. DESIGN, DIVIDERS, DEVICES and DATASHEETS
CLASS REFERENCE SUPPLEMENTAL CONCEPTS PROJECTS
14
Mar 7
111 Volt Divs:
CB HD* JL MM* TP
JR OS CT* WT HV* JW
CB FB* DC AG EL RM
LO* BS* LT* MT MvD*

Switch Basics
PBNO

PBNC

ACES' ER Technical Writing: Don'ts and Dos
Use of the Active Voice
Manual Input Devices:
Buttons: PBNO, PBNC
Switches (SPST, SPDT, DPDT)
Activities: Switch Circuit
Rocket Launch: RocketLaunchQuestion.fzz


Buttons and Switches

13
Mar 5
Rrview of DER Required Elements
12
Mar 1
Advice:
Review TEL3M FC
Feedback Emails
ACES' Frame Player:
Field Forms
Format Painter, Styles, Headers
Footers, Image Prep and Alignment
Hanging Indent
DER Exemplar

11
Feb 27
DER Guidelines
Design Engineering Report: ACES' Grad Email

+ + +   = 
Show/Hide, Ruler, Tabs, Breaks, Styles
1
10
Feb 25
The Concept of Voltage Division
Falstad: Voltage Division
1. SIGNALS, SUPPLY, SYMBOLS, and SCHEMATICS
CLASS REFERENCE SUPPLEMENTAL CONCEPTS PROJECTS
9
Feb 21
Circuit Analysis: LED Circuit
Introduction to Variable Resistors

Mechanical Potentiometers
Light-Dependent Resistors (LDRs)
Heat-Dependent Resistors (Thermistors)
Force-Sensitive Resistors (FSRs)
8
Feb 19
LED Datasheet
Waterfall Model (Continued)
DMM: Measuring Voltage and Amperage
Circuit Analysis: Resistor Circuit
Circuit Analysis: LED Circuit
7
Feb 13
Circuit Analysis
Waterfall Analysis
Introduction to VOLTAGE
Waterfall Model of a Closed Circuit
Fundamental Circuit Laws
:
KVL: Kirchhoff's Voltage Law, `V=IR`, `P=IV`
 
6
Feb 11
`R_E=R_1+R_2`
`1/R_E=1/R_1+1/R_2`
Resistors.xlsx (...a little math)
Analysis of Fixed Resistors in Series and Parallel
Concept of: Equivalent Resistance (`R_E`)
 
5
Feb 7
Voltage: `V=IR`
Power: `P=IV`


How To Use a Breadboard
ACES' Frame Player: Resistor Circuits
  
4
Feb 5
Fritzing
Digital Multimeter (DMM)
Circuit Symbols, Reading a Schematic
Useful Resistor Circuits, Wire Ampacity
  
3
Feb 1
 
The Resistor Applet
Direction of Current, Anode and Cathode
Power: `P=IxxV`
Increased Power
Wire Gauge (p. 77), Greek Alphabet (p. 78)
Fixed (Current-Limiting) Resistors
2
Jan 30
Starters are a dime-a-dozen...

Square Wave
→Sine Wave

(Analog Circuit)

Discussion: What is Electricity?
The Atom, Signals, Water Analogy, Flow Models
Giants of Electricity (p.81)
Supply: Voltage, Current (Direct and Alternating)
Direction of Current, Resistance
Circuit Symbols and Schematics
Reading a Schematic, Simple Resistor Circuits
Ben Eater: How Semiconductors Work

(PBS) Telsa:
Master of Lightning
1b
Jan 28
Nick Vassos:
Replacement Parts
Available in the Dragon's Lair 

ICS2O ISPs
Student Reflections
Why is this Course Necessary? The Workbook?
Technical Advisors, Acknowledgements
ACES: A Focus on Skills, Table of Contents
1a
Jan 28
Student Outline
Add F/C Conferences
Mr. D's Schedule
Distribute Workbook
and Toolkit
REPUTATION and RESPECT
RSGC ACES CULTURE: Taking a
Short, Medium, and Long Term View
of your Futures

ACES Hall of Fame:
E. McAulliffe ('18), Mariano Elia ('15), Jack Gettings ('10)

[ACES Culture]

For our second Field Trip of the year we have been invited to visit a factory that is developing solar panels. Since this device is an integral part of our Greenhouse Project this year, early familiarity with this technology will be advantageous.
What better way is there to start the year than with a walking field trip to acquire the electronic components that we will make good use of? You'll also be aware of its location for your own personal projects.
I have no formal training in electronics or electrical engineering - I'm just really interested in this field. The knowledge and skill I have has been largely acquired over the last few years from learning alongside many talented Georgians and I look forward to expanding my capabilities by working with you this year.
I ask six things of my ACES (for most other things I'm usually flexible):
1. SHORTCUTS. The world has enough corner-cutters. This is includes cheating, plagiarizing, or lying.
2. SHARED SPACE. Show respect for others that use the lab by putting your projects away and leaving your bench area tidy when you leave.
3. DES VISITORS. Show respect for adult visitors that enter the lab by immediately stopping what you are doing, standing and facing the individual(s).
4. NO EATING. Show respect for the lab by not eating in the DES. You may go into the hallway for a quick bite if you need to.
5. AVOID WASTE. Show respect for the lab's resources by not wasting or misusing them.
6. REPUTATION. Show respect for yourself by looking (and speaking) your best. It's the little things keep the doors of opportunity open.
  1. Matches will last exactly 5 minutes
  2. Two qualifying rounds (average points) will determine the initial Tournament seeding
  3. The top 8 seeds move on into the quarter-finals
  4. The Term 1 winner will play the winner of Term 2 in May to determine the Grade winner
  5. The Grade 10 winner will play one match against Mike Ciomyk to determine the 2015 School Champion
  6. Technical problems of any sort with your laptop during a match results in immediate disqualification from the match
Growing Success, p. 29
Responsibility, Organization, Independent Work, Collaboration, Initiative, Self-Reliant Growing Success. p.11.

It is worth noting, right from the start, that assessment is a human process, conducted by and with human beings, and subject inevitably to the frailties of human judgement.
However crisp and objective we might try to make it, and however neatly quantifiable may be our "results", assessment is closer to art than science.
It is, after all, an exercise in human communication.
Knowledge: Subject-specific content acquired in each course (knowledge), and the comprehension of its meaning and significance (understanding).
Thinking: The use of critical and creative thinking skills and/or processes, as follows:
Communication: The conveying of meaning through various forms, as follows:
Application: The use of knowledge and skills to make connections within and between various contexts.