ICS2O: FALL 2018  

7. INDEPENDENT STUDY PROJECT 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
39 Jan 18 
Final Hardware Class 

38 Jan 16 

37 Jan 14 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
36 Jan 10 
Work Period


35 Jan 8 

34 Dec 18 
オープンソースでプログラムもできる、ニキシー管デジタル時計がアツい
Decade Counter Output as Input to our THIRD Specialized IC: The 4511 BCD to 7Segment Decoder Fola's Version 

33 Dec 14 
ISP Proposal Due (handed to Mr. D at the START of the class) Decade Counter Output as Clock Input to our SECOND Specialized IC: The 4516 Up/Down (015) Counter 

32 Dec 12 
NGO Square Wave Output as Clock Input to our FIRST Specialized IC: The 4017 Decade Counter RSGC ACES: Decade Counter 

31 Dec 10 
ISP Proposal 555 Tutorials: #1, #2 (you want Astable mode) LM555 Datasheet Fun 555 Circuits 555 Calculator 
Best 555 Tutorial 
Logic Gates as Memory (latch, flipflop) Elements SR > D > FlipFlop Combination vs Sequential Logic Circuits: p.70 Comparators Operational Amplifiers (OpAmps): p.71 FALSTAD: 555 Simulation (Circuits > 555 Timer > Square Wave Generator) 

30 Dec 6 
The NAND Gate Oscillator (NGO) Activity. NGO Part 2 Animations: TP3, RC Drain Activity: NGO Part 3 Fola's Version 

29 Dec 4 

5. INTEGRATED CIRCUITS (ICs) I: DIGITAL LOGIC GATES 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
28 Nov 30 

27 Nov 28 
Combinational Logic Activties:
FALSTAD: Logic Gate IC Circuits Multiple Input Gates Gates as Operators: Boolean Arithmetic The eXclusive OR (XOR) Gate Activity. AdditionRelated Logic Circuits 

26 Nov 26 
Activity: Single input (Unary) Logic Gates
Breadboarding Tips for ICs 

25 Nov 22 
p. 4748 
=TEXT(DEC2HEX(H5),"0000")
Role of Venn Diagrams Digital Logic Gates  Truth Tables 

4. DIGITAL FUNDAMENTALS 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
24 Nov 20 
Signed Binary: The 2's Complement Algorithm 
Number Systems:
Binary (2) Octal (8), Decimal (10), Hexadecimal (16) Binary Representation of Characters: ASCII Table, Unicode 


23
Nov 14 
p. 45 
What is the difference between V_{cc}, V_{dd}, V_{ee}, V_{ss}, etc? Digital Name Pairs, The Binary Number System 

22 Nov 8 
Activity: Transistors as Logic Gates (TTL) Venn Diagram of Number Sets... Integers, Place Value Analog (Continuous) vs Digital (Discrete) Review of the Decimal Number System 

3. TRANSISTORS 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
21 Nov 6 
2N3904 Datasheet Build Session: Project 3. The Analog Oscillator Falstad: Analog Oscillator Simulation RSGC ACES: Astable Multivibrator Research: The Astable Multivibrator For Successful Builds...the early 
Project 3. The Analog Oscillator 

20 Nov 2 
Project 2. The Capacitor Visualizer (due tomorrow) Recall DiodeResistor Logic... TransistorTransistor Logic: AND, OR Transistor Testing Review/Discussion of Transistor Circuits 

19 Oct 31 


18 Oct 29 

2. DESIGN, DIVIDERS, DEVICES and DATASHEETS 

CLASS  REFERENCE  PROJECTS  CONCEPTS  SUPPLEMENTAL 
17 Oct 25 
Prototype Project 2. The Capacitor Visualizer Begin to conduct required time trials Introduction to Soldering Solder long leads to your PBNO, PBNC and Potentiometer Solder your *NEW* DC Breakout Board 

16 Oct 23 
Review of Voltage Division Feedback Email Measuring Capacitance with the DMM Review Capacitor Circuits on page 32 Prototype the circuit to the left... ...and then the rollover modification Capacitors as Timers: `tau = R times C` 
Voltage Division SA, AB, MC, ZC, JG, JK, LL, TM, HM, AM, LRC, JTP, ET**, KT, RT, JV, NWS JBe, PB, JBu*, PC, JD*, CG, MJ, SR, JS, LW 

15 Oct 19 

14 Oct 17 
The Underlying Principle of Digital Logic: PullDown and PullUp Resistor Configurations LOGIC Functions: OR, AND DiodeResistor Logic (DRL) 

13 Oct 15 
ACES' ER Technical Writing: Don'ts and Dos Use of the Active Voice Manual Input Devices: Buttons: PBNO, PBNC Switches (SPST, SPDT, DPDT) Activities: Switch Circuit Rocket Launch: RocketLaunchQuestion.fzz 
Buttons and Switches 

12 Oct 11 
Advice:
Review TEL3M FC Feedback Emails 
Open House (Period 2) 
ER Exemplar 

11 Oct 9 
ER Guidelines 

10 Oct 4 
The Two Roles of the Potentiometer: Variable Resistor and Voltage Divider Two Sample Circuits to Demonstrate the two Roles 

1. SIGNALS, SUPPLY, SYMBOLS, and SCHEMATICS 

CLASS  REFERENCE  SUPPORT  CONCEPTS  SUPPLEMENTAL 
9b Oct 2 
Summary of: Signals, Supply, Symbols, and Schematics 

9a Oct 2 
Circuit Analysis: LED Circuit Introduction to Variable Resistors Mechanical Potentiometers LightDependent Resistors (LDRs) HeatDependent Resistors (Thermistors) ForceSensitive Resistors (FSRs) 

8 Sep 28 
Waterfall Model (Continued) The Concept of Voltage Division DMM: Measuring Voltage and Amperage Circuit Analysis 

7 Sep 26 
Introduction to VOLTAGE Waterfall Model of a Closed Circuit Fundamental Circuit Laws: KVL: Kirchhoff's Voltage Law, `V=IR`, `P=IV` 

6 Sep 24 
`R_E=R_1+R_2`
`1/R_E=1/R_1+1/R_2` 
ACES' Frame Player: Resistor Circuits 
Analysis of Fixed Resistors in Series and Parallel Concept of: Equivalent Resistance (`R_E`) Resistors.xlsx (...a little more math) 

5 Sep 19 
Voltage: `V=IR`
Power: `P=IV` 
Ohm's Law 
Analysis of Single Resistor Circuit Resistors.xlsx (...a little math) 

4 Sep 17 


3 Sep 13 
111 
Direction of Current, Anode and Cathode Power: `P=IxxV` Wire Gauge (p. 77), Greek Alphabet (p. 78) Fixed (CurrentLimiting) Resistors 

2 Sep 11 
Discussion:
What is Electricity? The Atom, Signals, Water Analogy, Flow Models Giants of Electricity (p.81) Supply: Voltage, Current (Direct and Alternating) Direction of Current, Resistance Circuit Symbols and Schematics Reading a Schematic, Simple Resistor Circuits How Semiconductors Work 

1b Sep 7 
Distribute Workbook and Toolkit 
Starters are a dimeadozen... Student Reflections Why is this Course Necessary? The Workbook? Technical Advisors, Acknowledgements ACES: A Focus on Skills, Table of Contents 

1a Sep 7 
REPUTATION and RESPECT RSGC ACES CULTURE: Taking a Short, Medium, and Long Term View of your Futures ACES Hall of Fame: E. McAulliffe ('18), Mariano Elia ('15), Jack Gettings ('10) 
[ACES Culture] 