Fall 2020 ICS2O-E: DER PROJECTS
There are no quizzes, tests, or exams in our ACES program. Put another way, you are NEVER put into the position of having a dramatically limited amount of time to demonstrate the skills you have acquired. You can invest as much (or as little) time into your reports as you choose. In return for being granted complete control over the depth and quality of your submissions I can place a premium on detail, precision, and the pursuit of perfection. So, my advice to you if you want to become exceptional is to follow the written and oral instructions carefully and, beyond the required elements of each report, demonstrate tasteful and appropriate creativity and imagination to distinguish yourself from the mediocre. Good luck and, remember, the race is long but it's over quickly.
If you do not submit your report by the deadline specified, you receive a mark of 0. This is done as a favour to you to help you appreciate that the real world will dismiss you if you can not demonstrate responsibility and accountability. You are to archive ALL of your reports in the single Word document, DER.docx. The first page is your Title page, followed by a multi-page Table of Contents, after which your reports begin. EACH report will start at the top of the next new page and, unless otherwise specified, consist of the following sections, in the order listed,
The vast majority of us can tell the difference between quality and rubbish in an instant. As a young scholar you have to decide what your name will stand for. It should matter very little whether you enjoy a task or not; if you're going to attach your name to something it is a direct reflection of who you are.
This final activity provides a simple introduction to fundamental capabilities of many digital devices: counting and display. There are a number of stages or subcircuits in this system and your DER will clearly present the role played by each.
Start your DER with a big picture Theory section, written in your own words that mentions, generally, the input to the system, the generation of a clock signal consisting of pulses having both a duration and a frequency, culminating in the presentation of the pulse count on the display device. This would an ideal place to present a detailed, margin-to-margin Fritzing diagram, breadboard or (organized) schematic view, to introduce your readers to the full prototype you are about to describe and discuss in three pages that follow.
A Note on Graphics. Graphics should support the text they are illuminating. Poorly composed photos, sloppy and inconsistent choices for diagrams like pinouts and schematics work against you as they can confuse your readers and leave them with a sense that the author doesn't care about his presentation so why should they?
Follow the Theory Section with the eight subsections (A-H) described below. For the first section, Analog Input, include, as a graphic, that part of the schematic that it pertains to. The next five sections (B-F) subsections should include a Reference Section that includes the respective live hyperlink appearing below:
Following the Reference Subsection within each of the five areas, include a Purpose section (this one could go before the Reference Section) describing in detail, how each stage contributes to the sequence. Be sure to clearly present the input, processing, and output of each stage, supported by informative, attractive, and well-formatted graphics.
Following the final subsections include Media (captioned photos and video) and Reflection sections.
Congratulations on reaching the final stage (8) of our marathon Counting Circuit project! Students that have successfully soldered their PCBs that demonstrate forward (and backwards) counting on the seven-segment display are invited to present their circuit to Mr. D. to receive a custom case designed and printed in the DES by J. Dolgin (ACES '20) into which their device can be mounted. A similar two-colour case was printed on the Ultimaker 3 in 2018 by K. Fiset-Algarvio (ACES '19). Click the image below to view a short time-lapse video of the case being printed,
Power for the device is sourced from a 9V battery inside a compartment within the interior of the case. The leads of a battery snap can be soldered to the correct pads in lieu of an external DC Jack. Be sure to place electrical tape across the battery to insulate it from the bottom of your PCB to prevent the possibility of shorting. Finally, screw the assembly together and fully test, prior to capturing the final frames of your project video.
Finally, be sure to address ALL issues from previous submissions and update your Table of Contents before attaching DER.docx to an email to handin under the Subject Line: A Counting Circuit (Complete)
Exploring the lower and lowest levels of any concept provides you with insights and capabilities for superior performance at the higher levels. Our Session 3 examination of transistors and logic gates has introduced you to a relatively fundamental level of computer technology that will serve to inform your future studies in this area. This project gives you a hands-on opportunity to solidify your knowledge and skills.
Finally, before you begin reading this project description, I want you to challenge yourself. To THINK and do some research. Engineering requires concentration, focus, and discipline. If you can bring these skills to bear on your prototype, and ensuing Report, you'll experience a deep feeling of personal satisfaction unlike few others. The alternative is to take a superficial approach, casually guessing at what might work, blowing parts that are not easily replaced, or simply leaning too heaviliy on your smarter peers to get you across the finish line. This is like eating junk food in that you might experience a brief rush of having finished, but also a quick return to that empty feeling of a wasted opportunity to put another strong block in your solid engineering foundation. You'll have to decide.
for 2020/2021. Our Inside Gates worksheet confirmed that the results of two-input NAND logic can be represented with two NPN transistors in series, in a pull up resistor configuration.
The purpose of this project is to confirm NAND's digital logic results in two ways: using the two analog NPN transistors to the left of the button inputs, and the CMOS 4011 digital logic IC to the right.
Task 1. On a single breadboard you are to assemble the major components shown below in roughly the positions indicated. The inputs to the circuit are two SPST momentary buttons (A and B), each one wired in a pulldown manner (use 4.7 kΩ resistors for the two pulldowns).The two outputs are the L1 and L2 red LEDs, each depicting the result of each NAND processor. Naturally, a successful conclusion will see the same output on each red LED for any of the four combinations of inputs (LL, LH, HL, HH)
The NAND gate is also referred to as the Universal Gate in that by wiring together one of more NAND gates, it is possible to achieve the same outputs as any of the other fundamental gates. You will research how to wire NAND gates to achieve each of the other logic results. Task 1 used only one of the four NAND gates on the CMOS 4011 IC. This gives us an opportunity to provide confirmation of NAND gate emulation of another logic operation, namely AND Logic.
Task 2. Using as many of the unused gates on the CMOS 4011 as necessary, wire the A and B inputs into the IC is such a fashion as to present the results of AND logic on the green LED , L3. If you have wired it correctly, the output on the green L3 should appear inverted from the red LEDs, L1 and L2. for every combination of button presses.
Attach your updated DER to an email to handin under the Subject Line: NAND: The Universal Gate no later than Saturday November 21, at midnight.
Along with resistors, capacitors belong to a family of components known as passives in that they do not introduce a new source of energy into a circuit. Capacitors serve a number of useful functions in both DC and AC circuits. In completing this project you will strengthen your understanding that the capacitor (in series with a resistor), plays in the timing aspects of analog DC circuitry.
This project takes time to undertake properly, so be patient, and start early.
The schematic, below left, is of a test circuit that, in my view, best illustrates of the functional behaviour of an electrolytic capacitor in a DC circuit. You are familiar with the concept of a voltage divider from your first project. Looking at the junction (node) between S1, R1 and R2, we introduce the notion of a current divider as the current splits into two branches due to their parallel configuration.
We have discussed the charging of an empty capacitor in terms of time constants and the effect this has on the capacitor in terms of its resistance (in AC circuits this property is referred to as reactance). In a DC circuit, a single RC Time Constant, denoted τ, can be expressed simply as,
where τ is measured in seconds, R is measured in Ω, and C is measured in F. Also discussed in class (p. 32) is the expectation that after 5 RC time constants the capacitor is virtually fully charged (5τ~99%). One of the objectives of this project is to observe and confirm the expected results.
|Schematic||Printed Circuit Board|